中国科大微电子学院
  

陈松

邮箱:songch@ustc.edu.cn

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经历:
2012.9 ~ 至今: 中国科学技术大学电子科学与技术系 副教授
2005.8 ~ 2012.8: 早稻田大学理工学术院 博士后、助理教授
2000.9 ~ 2005.7: 清华大学计算机科学与技术系 硕士、博士
1996.9 ~ 2000.7: 西安交通大学计算机科学与技术系 本科

简介:

主要研究方向为电子设计自动化、高能效计算,包括脑启发的新型计算架构设计及其自动化、高层次综合、物理设计、专用片上网络设计、神经网络加速器设计等。主持国家自然科学基金青年项目1项(已结题)、面上项目2项(结题1项,在研1项)、重点项目子课题1项(在研),作为骨干参与了科技部重点研发计划、中国科学院先导专项(B)、北京市科技委重点研发计划、安徽省科技攻关等项目的研究工作。在电子设计自动化领域顶级期刊IEEE Trans. on CADACM Trans. DAES以及IEEE T-VLSIIntegration-the VLSI JournalIEICE Transactions等国际期刊上共发表/合作发表论文30余篇。

 

荣誉:

中国科学技术大学校级“优秀博士学位论文”指导老师,2018
第一届全国大学生集成电路创新创业大赛优秀指导老师(指导学生获全国总决赛二等奖),2017
日本电子信息通信协会(IEICE)最佳学生论文奖 (IEEE/ACM ASPDAC 2013)指导老师,2013
IEEE 第10届专用集成电路国际学术会议(ASICON 2013)最佳学生论文奖 指导老师
IEEE 亚州及太平洋地区电路与系统会议(APCCAS 2006) 最佳论文奖


论文:

1. Song Chen, Mengke Ge, Zhigang Li, Jinglei Huang, Qi Xu, and Feng Wu, “Generalized Fault-Tolerance Topology Generation for Application Specific Network-on-Chips”,IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). October, 2019. (In press, preprint )
2. Qi Xu, Hao Geng, Song Chen, Bei Yu, Feng Wu, “Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC”, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol.25, no.1, pp.8:1–8:19, 2019.
3. Song Chen, Jinglei Huang, Xiaodong Xu, Bo Ding, Qi Xu, “Integrated Optimization of Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), October, Vol.39, No.1, pp.199-212, January 2019.(online).
4. Song Chen, Qi Xu, Bei Yu, “Adaptive 3D-IC TSV Fault Tolerance Structure Generation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol.38, No.5, pp.949-960,2019.
5. Yan Li, Zhiwei Li, Chen Yang, Wei Zhong, and Song Chen, “High throughput Hardware architecture for accurate semi-global matching”, Integration-the VLSI Journal, Volume 65, March 2019, Pages 417-427.
6. Nan Wang, Song Chen, Jianmo Ni, Xiaofeng Ling and Yu Zhu, Security-Aware Task Scheduling Using Untrusted Components in High-Level Synthesis, in IEEE Access, vol. 6, pp. 15663 - 15678, 2018.
7. Qi Xu, Song Chen, Xiaodong Xu, Bei Yu, Clustered Fault Tolerance TSV Planning for 3D Integrated Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). Vol. 36, No.8, pp. 1287-1300, Aug. 2017.
8. Gan Feng, Lan Yao, Song Chen, AutoNFT: Architecture Synthesis for Hardware DFT of Length of Coprime-Number Products, Integration-the VLSI Journal, vol. 58, No.6, pp.339-347, June 2017.
9. Nan Wang, Wei Zhong, Cong Hao, Song Chen, Takeshi Yoshimura, Yu Zhu, Leakage Power-Aware Scheduling with Dual-Threshold Voltage Design, IEEE Transactions on Very Large Scale Integration Systems (TVLSI) vol.24, No.10, pp. 3067-3079,2016.
10. Jinglei Huang, Song Chen, Wei Zhong, Wenchao Zhang, Shengxi Diao, Fujiang Lin, Floorplanning and Topology Synthesis for Application Specific Network-on-Chips with RF-Interconnect, ACM Transactions on Design Automation of Electronic Systems (TODAES) 21(3):40,23 pages, 2016.
11. Qi Xu,Song Chen, Bin Li, “Combining the ant system algorithm and simulated annealing for 3D/2D fixed-outline floorplanning”, Applied Soft Computing, 40:150-160, 2016/03.
12. Song Chen and T. Yoshimura, “Fixed-outline floorplanning: Enumerating block positions and a new objective function for calculating area costs,” IEEE Transactions on CAD of Integrated Circuits and Systems (TCAD), vol.27, no. 5, pp.858-871, 2008.


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